April 14 - 17, 2019
San Francisco, California, USA

ISPD Lifetime Achievement Award

This award is given to individuals who have made outstanding contributions to the field of physical design automation over multiple decades. The purpose is to recognize their lifetime of achievements and contributions in terms of research work, education, and professional service.

Award Recipients:

2019Prof. Alberto Sangiovanni-Vincentelli
2018Prof. Te C. Hu
2017Prof. Satoshi Goto
2016Prof. Ralph Otten
2015Prof. Kurt Antreich
2014Dr. Bryan Preas
2013Prof. Yoji Kajitani
2012Prof. C.-L. Liu
2011Prof. Ernest Kuh

ISPD Best Paper Award

Starting from 2002, ISPD recognizes excellence by giving a Best Paper award.

Award Recipients:

2018 Charles J. Alpert, Wing-Kai Chow, Kwangsoo Han, Andrew B. Kahng, Zhuo Li, Derong Liu, and Sriram Venkatesh Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees
2017 Hang Zhang, Fengyuan Zhu, Haocheng Li, Evangeline F. Y. Young, and Bei Yu Bilinear Lithography Hotspot Detection
2016 Wen-Hsiang Chang, Li-De Chen, Chien-Hsueh Lin, Szu-Pang Mu, Mango C.-T. Chao, Cheng-Hong Tsai, Yen-Chih Chiu Generating Routing-Driven Power Distribution Networks with Machine-Learning Technique
2015 Hsi-An Chien, Szu-Yuan Han, Ye-Hong Chen and Ting-Chi Wang A Cell-Based Row-Structure Layout Decomposer for Triple Patterning Lithography
2014 Subhendu Roy, Pavlos M. Mattheakis, Laurent Masse-Navette and David. Z. Pan Clock Tree Resynthesis for Multi-corner Multi-mode Timing Closure
2013 Hua Xiang, Minsik Cho, Haoxing Ren, Matthew Ziegler and Ruchir Puri Network flow based datapath bit slicing
2012 Jackey Z. Yan and Chris Chu Optimal Slack-Driven Block Shaping Algorithm in Fixed-Outline Floorplanning
2011 Kun Yuan and David Z. Pan E-Beam Lithography Stencil Planning and Optimization with Overlapped Characters
2010 Lijuan Luo, Tan Yan, Qiang Ma, Martin Wong and Toshiyuki Shibuya B-Escape: A Simultaneous Escape Routing Algorithm Based on Boundary Routing
2009 Qunzeng Liu and Sachin Sapatnekar Synthesizing a Representative Critical Path for Post-Silicon Delay Prediction
2008 Stephen M. Plaza, Igor L. Markov and Valeria Bertacco Optimizing Non-Monotonic Interconnect Using Functional Simulation and Logic Restructuring
2007 Vishal Khandelwal and Ankur Srivastava Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation
2006 Jinjun Xiong, Vladimir Zolotove and Lei He Robust Extraction of Spatial Correlation
2005 Tony Chan, Jason Cong and Kenton Sze Multilevel Generalized Force-Directed Method for Circuit Placement
2004 Natarajan Viswanathan and Chris Chu FastPlace: Efficient Analytical Placement using Cell Shifting, Iterative Local Refinement and a Hybrid Net Model
2003 Ting-Yuan Wang, Yu-Min Lee and Charlie Chung-Ping Chen 3D Thermal-ADI: An Efficient Chip-Level Transient Thermal Simulator
2002 A. Rohe and U. Brenner An Effective Congestion Driven Placement Framework