The International Symposium on Physical Design provides a premier forum to exchange ideas and promote research on critical areas related to the physical design of VLSI systems. All aspects of physical design, including its interactions with architecture, behavioral- and logic-level synthesis, and back-end performance analysis and verification are within the scope of the symposium. Target domains include semi-custom and full-custom ICs, regular fabrics, FPGAs, and systems-on-chip / systems-in-package. Following its twenty-five predecessors, the 2017 symposium will highlight key new directions and leading-edge theoretical and experimental contributions to the field. The ACM Press will publish accepted papers in the Symposium proceedings.
Continuing the tradition of spirited competition of the previous twelve ISPD contests, a contest will again be held. The ISPD 2017 contest is Clock-Aware FPGA Placement. Please follow the link for the pertinent details.
The symposium will pay a tribute to Professor Satoshi Goto, the winner of the 2017 ISPD Lifetime Achievement Award.
|Title and abstract submission deadline||October 3, 2016 (23:59 U.S. Pacific Time)|
|Full manuscript submission deadline||October 10, 2016 (23:59 U.S. Pacific Time)|
|Paper acceptance notification||November 12, 2016|
|Camera-ready paper due||January 24, 2017|
|Early registration deadline||February 15, 2017|
|Hotel special rate deadline||February 19, 2017|
|Symposium||March 19-22, 2017|
Sponsored by ACM/SIGDA with Technical Co-Sponsorship from IEEE CAS. Additional support from: